Timing Report

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Design Name main
Device, Speed (SpeedFile Version) XC9572XL, -10 (3.0)
Date Created Tue Jan 27 16:57:01 2009
Created By Timing Report Generator: version K.39
Copyright Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.

Summary

Notes and Warnings
Note: This design contains no timing constraints.
Note: A default set of constraints using a delay of 0.000ns will be used for analysis.

Performance Summary
Pad to Pad Delay (tPD) 24.200 ns.

Timing Constraints

Constraint Name Requirement (ns) Delay (ns) Paths Paths Failing
TS1000 0.0 0.0 0 0
TS1001 0.0 0.0 0 0
TS1002 0.0 0.0 0 0
TS1003 0.0 0.0 0 0
TS1004 0.0 0.0 0 0
AUTO_TS_F2F 0.0 0.0 0 0
AUTO_TS_P2P 0.0 24.2 148 148
AUTO_TS_P2F 0.0 0.0 0 0
AUTO_TS_F2P 0.0 0.0 0 0


Constraint: TS1000

Description: PERIOD:PERIOD_ireset0.CLKF:0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: TS1001

Description: PERIOD:PERIOD_bank.CLKF:0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: TS1002

Description: PERIOD:PERIOD_bstate<0>.CLKF:0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: TS1003

Description: PERIOD:PERIOD_bstate<1>.CLKF:0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: TS1004

Description: PERIOD:PERIOD_bstate<2>.CLKF:0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: AUTO_TS_F2F

Description: MAXDELAY:FROM:FFS(*):TO:FFS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: AUTO_TS_P2P

Description: MAXDELAY:FROM:PADS(*):TO:PADS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
ja22 to pd<0> 0.000 24.200 -24.200
ja22 to pd<10> 0.000 24.200 -24.200
ja22 to pd<11> 0.000 24.200 -24.200


Constraint: AUTO_TS_P2F

Description: MAXDELAY:FROM:PADS(*):TO:FFS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: AUTO_TS_F2P

Description: MAXDELAY:FROM:FFS(*):TO:PADS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)



Number of constraints not met: 1

Data Sheet Report

Maximum External Clock Speeds

Clock fEXT (MHz) Reason

Setup/Hold Times for Clocks


Clock to Pad Timing


Clock to Setup Times for Clocks


Pad to Pad List

Source Pad Destination Pad Delay
ja22 pd<0> 24.200
ja22 pd<10> 24.200
ja22 pd<11> 24.200
ja22 pd<12> 24.200
ja22 pd<13> 24.200
ja22 pd<15> 24.200
ja22 pd<1> 24.200
ja22 pd<2> 24.200
ja22 pd<3> 24.200
ja22 pd<4> 24.200
ja22 pd<5> 24.200
ja22 pd<6> 24.200
ja22 pd<7> 24.200
ja22 pd<8> 24.200
ja22 pd<9> 24.200
jd<14> pd<0> 24.200
jd<14> pd<10> 24.200
jd<14> pd<11> 24.200
jd<14> pd<12> 24.200
jd<14> pd<13> 24.200
jd<14> pd<15> 24.200
jd<14> pd<1> 24.200
jd<14> pd<2> 24.200
jd<14> pd<3> 24.200
jd<14> pd<4> 24.200
jd<14> pd<5> 24.200
jd<14> pd<6> 24.200
jd<14> pd<7> 24.200
jd<14> pd<8> 24.200
jd<14> pd<9> 24.200
ja22 eza0 20.000
ja22 eza1 20.000
ja22 ezrd30 20.000
ja22 ezwr31 20.000
ja22 floe 20.000
ja22 flwe 20.000
ja22 preset 20.000
jd<14> ezwr31 20.000
jrom1 eza0 20.000
jrom1 eza1 20.000
jrom1 ezrd30 20.000
jrom1 ezwr31 20.000
jrom1 floe 20.000
jrom1 flwe 20.000
jrom1 preset 20.000
jrw eza1 20.000
jrw ezrd30 20.000
jrw ezwr31 20.000
jrw floe 20.000
jrw flwe 20.000
jrw preset 20.000
pd<0> jd<0> 20.000
pd<10> jd<10> 20.000
pd<11> jd<11> 20.000
pd<12> jd<12> 20.000
pd<13> jd<13> 20.000
pd<14> jd<14> 20.000
pd<15> jd<15> 20.000
pd<1> jd<1> 20.000
pd<2> jd<2> 20.000
pd<3> jd<3> 20.000
pd<4> jd<4> 20.000
pd<5> jd<5> 20.000
pd<6> jd<6> 20.000
pd<7> jd<7> 20.000
pd<8> jd<8> 20.000
pd<9> jd<9> 20.000
jd<0> pd<0> 16.500
jd<10> pd<10> 16.500
jd<11> pd<11> 16.500
jd<12> pd<12> 16.500
jd<13> pd<13> 16.500
jd<14> pd<14> 16.500
jd<15> pd<15> 16.500
jd<1> pd<1> 16.500
jd<2> pd<2> 16.500
jd<3> pd<3> 16.500
jd<4> pd<4> 16.500
jd<5> pd<5> 16.500
jd<6> pd<6> 16.500
jd<7> pd<7> 16.500
jd<8> pd<8> 16.500
jd<9> pd<9> 16.500
ja22 pd<14> 11.700
jrom1 jd<0> 11.000
jrom1 jd<10> 11.000
jrom1 jd<11> 11.000
jrom1 jd<12> 11.000
jrom1 jd<13> 11.000
jrom1 jd<14> 11.000
jrom1 jd<15> 11.000
jrom1 jd<1> 11.000
jrom1 jd<2> 11.000
jrom1 jd<3> 11.000
jrom1 jd<4> 11.000
jrom1 jd<5> 11.000
jrom1 jd<6> 11.000
jrom1 jd<7> 11.000
jrom1 jd<8> 11.000
jrom1 jd<9> 11.000
jrom1 pd<0> 11.000
jrom1 pd<10> 11.000
jrom1 pd<11> 11.000
jrom1 pd<12> 11.000
jrom1 pd<13> 11.000
jrom1 pd<14> 11.000
jrom1 pd<15> 11.000
jrom1 pd<1> 11.000
jrom1 pd<2> 11.000
jrom1 pd<3> 11.000
jrom1 pd<4> 11.000
jrom1 pd<5> 11.000
jrom1 pd<6> 11.000
jrom1 pd<7> 11.000
jrom1 pd<8> 11.000
jrom1 pd<9> 11.000
jrw jd<0> 11.000
jrw jd<10> 11.000
jrw jd<11> 11.000
jrw jd<12> 11.000
jrw jd<13> 11.000
jrw jd<14> 11.000
jrw jd<15> 11.000
jrw jd<1> 11.000
jrw jd<2> 11.000
jrw jd<3> 11.000
jrw jd<4> 11.000
jrw jd<5> 11.000
jrw jd<6> 11.000
jrw jd<7> 11.000
jrw jd<8> 11.000
jrw jd<9> 11.000
jrw pd<0> 11.000
jrw pd<10> 11.000
jrw pd<11> 11.000
jrw pd<12> 11.000
jrw pd<13> 11.000
jrw pd<14> 11.000
jrw pd<15> 11.000
jrw pd<1> 11.000
jrw pd<2> 11.000
jrw pd<3> 11.000
jrw pd<4> 11.000
jrw pd<5> 11.000
jrw pd<6> 11.000
jrw pd<7> 11.000
jrw pd<8> 11.000
jrw pd<9> 11.000



Number of paths analyzed: 148
Number of Timing errors: 148
Analysis Completed: Tue Jan 27 16:57:01 2009